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Algorithmic and register-transfer level synthesis:the system architect`s workbench /
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High-level VLSI synthesis /
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Proceedings the European conference on design automation with the European event in ASIC design : 2.diel:The user forum and AUROASIC prizes sessions : Konf. EURO ASIC '93, Paris, France, 22.- 25. Feb. 1993 : Obs. 1.zv.:, 601 s.. 2.zv.:, 274 s
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Synthesis and optimization of digital circuits /
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Algorithms and parallel VLSI architectures : Konf. Proceedings of the International Workshop on Algorithms and Parallel VLSI Architectures , Abbaye des Prémontrés,Pont-aMousson, France, 10.- 16. June 1990 : Obs. Vol.A., Tutorials, 475 s.. Vol.B., Proceedings, 524 s /
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Embedded System Design : A Unified Hardware/Software Introduction
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DARWIN2K. An Evolutionary Approach to Automated Design for Robotics
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Symbolic model checking /
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Principles of Model checking
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Model checking
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Analog Design Essentials
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Computer Aids for VLSI design /
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Analogue IC design : the current - mode approach /
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Distributed operating systems. The logical design /
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The European conference on design automation : Konf. Brussels, Belgium, 16.- 19. March 1992
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European design & test conference : Konf. ED&TC 97, Paris, France, 27.- 30. March 1997
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The European design and test conference : Konf. Paris, France, 28. Febr. - 3. March 1994 : Obs. Proceedings, 676 s.. User Forum, 223 s
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European design & test conference : Konf. ED&TC 96, Paris, France, 11.- 14. March 1996 : Obs. Proceedings, 623 s.. User forum, 299 s
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32nd design automation conference : Proceedings 1995 : Konf. San Francisco, California, 12.- 16. June 1995
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DARWIN2K :
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Formal methods for VLSI design /
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Analogue - digital ASICs : circuit techniques, design tools and applications /
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Automatic verification methods for finite state systems : Konf. International Workshop, Grenoble, France, 12.- 14. juna. 1989 /
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SPECC : Specification language and methodology
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Formal methods for VLSI design /
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Algorithms and parallel VLSI architectures : Konf. Proceedings of the International Workshop on Algorithms and Parallel VLSI Architectures , Abbaye des Prémontrés,Pont-aMousson, France, 10.- 16. June 1990 : Obs. Vol.A., Tutorials, 475 s.. Vol.B., Proceedings, 524 s /
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Automatic verification methods for finite state systems : Konf. International Workshop, Grenoble, France, 12.- 14. juna. 1989 /
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The European design and test conference : Konf. Paris, France, 28. Febr. - 3. March 1994 : Obs. Proceedings, 676 s.. User Forum, 223 s
-
System level hardware/software co-design : An industrial approach
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Proceedings the European conference on design automation with the European event in ASIC design : 2.diel:The user forum and AUROASIC prizes sessions : Konf. EURO ASIC '93, Paris, France, 22.- 25. Feb. 1993 : Obs. 1.zv.:, 601 s.. 2.zv.:, 274 s
-
High-level VLSI synthesis /
-
The European conference on design automation : Konf. Brussels, Belgium, 16.- 19. March 1992
-
Distributed operating systems. The logical design /
-
Synthesis and optimization of digital circuits /
-
32nd design automation conference : Proceedings 1995 : Konf. San Francisco, California, 12.- 16. June 1995
-
European design & test conference : Konf. ED&TC 96, Paris, France, 11.- 14. March 1996 : Obs. Proceedings, 623 s.. User forum, 299 s
-
Symbolic model checking /
-
Computer Aids for VLSI design /
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SPECC : Specification language and methodology
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European design & test conference : Konf. ED&TC 97, Paris, France, 27.- 30. March 1997
-
DARWIN2K. An Evolutionary Approach to Automated Design for Robotics
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Algorithmic and register-transfer level synthesis:the system architect`s workbench /
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SSADM Version 4 : The advanced practitioner's guide /
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Principles of Model checking
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Model checking
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DARWIN2K :
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Návrh komunikácie integrovaného obvodu 8255 s PC = Design of 8255 integrated circuit communication with PC : Bakalárska práca
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Príspevky k teórii logických obvodov : Habil.práca : Obh. 21.11.1995 /
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Návrh prostriedkov pre automatizované testovanie výkonových integrovaných obvodov
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Príspevok k návrhu a implementácii RF integrovaných obvodov v CMOS technológii : Dát. obhaj. 8.12.2010, čís. ved. odb. 5.2.13
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Využitie umelých neurónových sietí v diagnostike integrovaných obvodov : obhaj. 19.12.2007
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Testovanie a lokalizácia defektných částí zmiešaných integrovaných obvodov pomocou vstavaného IDD prúdového monitora : Č.ved.odb. 26-13-9. Dát. obhaj. 23.5.2008
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Vybrané problémy integrácie obvodov pre vysoké : Dát.obhaj. 22.09.2009
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Alternatívne metódy testovania integrovaných obvodov a systémov na čipe : Obh. 09.09.2003
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On-chip power supply current monitoring of CMOS VLSI circuits = Testovanie CMOS VLSI obvodov monitorovaním prúdu z napájacieho zdroja priamo na čípe : Dizertačná práca : Obh. 22.05.1997 /
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Nitridové vrstvy pre Schottkyho kontakty na GaAs : Kand.diz.práca : V.odb. 26-11-9 : Obh. 20.10.1994 /
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Herausforderung Mikroelektronik /
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Algorithms and parallel VLSI architectures : Konf. Proceedings of the International Workshop on Algorithms and Parallel VLSI Architectures , Abbaye des Prémontrés,Pont-aMousson, France, 10.- 16. June 1990 : Obs. Vol.A., Tutorials, 475 s.. Vol.B., Proceedings, 524 s /
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Formal equivalence checking and disign debugging
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System level hardware/software co-design : An industrial approach
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Proceedings the European conference on design automation with the European event in ASIC design : 2.diel:The user forum and AUROASIC prizes sessions : Konf. EURO ASIC '93, Paris, France, 22.- 25. Feb. 1993 : Obs. 1.zv.:, 601 s.. 2.zv.:, 274 s
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High-level VLSI synthesis /
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Návrh napäťovej referencie pre analógové integrované obvody V CMOS technológii
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Logic synthesis and verification algorithms /
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BEC '96. The 5th biennial Baltic electronics conference : Proceedings : Konf. Tallinn, Estonia, 7.- 11. Oct. 1996
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Introduction to digital systems
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Návrh a realizácia adaptéra MTS 01 Adaptér TTL 3 /
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Handbook of Semiconductor Lasers and Photonic Integrated Circuits /
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Combinatorial algorithms for integrated circuit layout /
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Začínáme pracovat s mikrokontroléry Motorola HC08 NITRON