Naylor, D., & Jones, S. (1997). VHDL: A logic synthesis approach. Chapman and Hall.
Successfully copied to clipboard
Copying to clipboard failed
Citação norma Chicago
Naylor, David, and Simon Jones. VHDL: A Logic Synthesis Approach. London: Chapman and Hall, 1997.
Successfully copied to clipboard
Copying to clipboard failed
Citação norma MLA
Naylor, David, and Simon Jones. VHDL: A Logic Synthesis Approach. Chapman and Hall, 1997.
Successfully copied to clipboard
Copying to clipboard failed
Nota: a formatação da citação pode não corresponder 100% ao definido pela respectiva norma.