Cita APA (7a ed.)
Putiatin, K., & Mach, J. (2025). Extending a RISC-V processor with bit instructions.
Cita Chicago Style (17a ed.)
Putiatin, Kirill, y Ján Mach. Extending a RISC-V Processor with Bit Instructions. 2025.
Cita MLA (9a ed.)
Putiatin, Kirill, y Ján Mach. Extending a RISC-V Processor with Bit Instructions. 2025.
Precaución: Estas citas no son 100% exactas.