Syntéza a analýza obvodových blokov v jazyku Verilog
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| Autor principal: | |
|---|---|
| Outros Autores: | |
| Formato: | Manuscrito Livro |
| Idioma: | eslovaco |
| Publicado em: |
Bratislava :
STU v Bratislave FEI,
2023
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| Assuntos: | |
| Acesso em linha: | https://opac.crzp.sk/?fn=detailBiblioFormChildMOR05&sid=925BFB95FAA30F229095C8019F0C&seo=CRZP-detail-kniha |
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| 242 | 0 | 1 | |a Synthesis and analysis of circuit blocks in Verilog |y eng |
| 245 | 1 | 0 | |a Syntéza a analýza obvodových blokov v jazyku Verilog |
| 260 | |a Bratislava : |b STU v Bratislave FEI, |c 2023 | ||
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| 650 | 4 | |a verilog |2 slo | |
| 650 | 4 | |a digitálne logické bloky |2 slo | |
| 650 | 4 | |a parametrizácia |2 slo | |
| 650 | 4 | |a digital logic blocks |2 eng | |
| 650 | 4 | |a verilog |2 eng | |
| 650 | 4 | |a parametrization |2 eng | |
| 700 | 1 | |a Nagy, Lukáš |u 033000 |k Z1 |4 ths |U FEI Fakulta elektrotechniky a informatiky |T FEI Ústav elektroniky a fotoniky |X 12020 |U E030 |Y 549 |7 A000012020 | |
| 856 | 4 | |u https://opac.crzp.sk/?fn=detailBiblioFormChildMOR05&sid=925BFB95FAA30F229095C8019F0C&seo=CRZP-detail-kniha | |